1. Field of the Invention
The present invention relates to the integration of low-K SiOF as an inter-layer dielectric (ILD). In particular, the present invention relates to integrating fluorosilicate glass (FSG) or SiOF as a full stack inter-metal dielectric, to thereby obtain the benefit of a low dielectric constant (low-k) to improve device performance.
2. Description of the Related Art
Fluorinated SiO2, typically provided by way of plasma enhanced chemical vapor deposition (PECVD) or by way of high density plasma (HDP), can be used to lower the dielectric constant of SiO2 from, for example, 4.0 to 3.5-3.8. The lowering of the dielectric constant is advantageous for a number of reasons, including the reduction of the capacitance of a semiconductor device, which results in an improved performance of the semiconductor device.
However, fluorine in SiO2 will react with physical vapor deposition (PVD) or chemical vapor deposition (CVD) barrier metals, such as Ti, TiN, Ta, TaN, etc., which are subsequently deposited on the surface of the fluorinated SiO2. This reaction between fluorine and the barrier metals will cause delamination on flat SiOF surfaces, as well as inside via holes. Both of these occurrences are disadvantageous.
It is an object of the present invention to provide a full stack fluorosilicate glass (FSG) as an inter-layer dielectric, whereby the possibility of fluorine leakage to neighboring layers is lessened by treating the FSG with a plasma such that a fluorine-depleted region and a nitrided region are obtained.
It is another object of the present invention to provide an oxide cap on top of nitrided region to provide an additional barrier to the fluorine atoms from moving into adjacent conductive (e.g., metal) layers.
It is yet another object of the present invention to provide a full stack FSG as an inter-metal dielectric layer using in-situ deposition.
The above-mentioned objects and other advantages of the present invention may be achieved by a method of forming an interlayer dielectric on a substrate. The method includes a step of forming a conducting layer on the substrate. The method also includes a step of forming a first interlayer dielectric layer on the conducting layer by HDP using a high etch/deposition ratio with high bias power, the first interlayer dielectric layer containing fluorine. The method further includes a step of forming a second interlayer dielectric layer on the first interlayer dielectric layer by HDP using a low etch/deposition ratio, the second interlayer dielectric layer containing fluorine. The first and second interlayer dielectric layers collectively form the interlayer dielectric between the conducting layer and any other conducting layers formed above the interlayer dielectric.
The above-mentioned objects and other advantages may also be achieved by a semiconductor device formed on a substrate. The semiconductor device includes at least one conductive layer formed on the substrate. The device also includes a fluorosilicate glass layer formed on the at least one conductive layer, the fluorosilicate glass layer acting as an interlayer dielectric for the semiconductor device. The fluorosilicate glass layer includes a fluorine-depleted layer at a top portion of the fluorosilicate glass. The fluorine-depleted layer lessens a likelihood of fluorine atoms in the fluorosilicate glass layer from moving into and thereby corrupting another conducting layer formed above the fluorosilicate glass layer.
The above-mentioned objects and advantages may still further be achieved by a semiconductor device formed on a substrate. The semiconductor device includes at least one conductive layer formed on the substrate. The device also includes a first fluorosilicate glass layer formed on the at least one conductive layer, the first fluorosilicate glass layer having a thickness greater than a height of the at least one metal stack, where the first fluorosilicate glass layer is formed by HDP with a high etch/deposition ratio. The device further includes a second fluorosilicate glass layer formed on the first fluorosilicate glass, the second fluorosilicate glass layer acting together with the first fluorosilicate glass as an interlayer dielectric for the semiconductor device and having a thickness greater than the thickness of the first fluorosilicate glass layer, where the second fluorosilicate glass layer is formed by HDP with a low etch/deposition ratio.